Usage Guides

These are guides that are useful for learning how to use LibreLane, including hardening macros and writing custom flows and scripts.

• Process Design Kits
  • Specifying your PDK
  • Standard Cell Libraries
  • Building, location and downloading
  • The PDK Root
• Power Distribution Networks
  • Straps
  • Rings
  • Macro Integration
  • Ring Method
• Timing Corners
  • Default Flow Configuration
• Achieving Timing Closure
  • Introduction
  • Tips for Achieving Timing Closure
  • SDF Annotated GL Simulation using CVC
  • References
  • Acronyms on this Page
• Using Macros
  • Macro Files
  • In LibreLane Configurations
  • STA
  • Working with Macros in your RTL
  • Misc. Useful Variables
• Using VHDL
  • Limitations
• Using ECO Steps
  • Example
  • Adding it to your flow
  • Configuring buffers
• Writing Custom Flows
  • Custom Sequential Flows
  • Fully Customized Flows
  • Error Throwing and Handling
• Writing Custom Steps
  • Generic Steps
  • Creating Reports
  • Creating Metrics
  • Tool-Specific Steps
• Writing and Using Plugins
  • Registering new Flows and Steps
  • Including Tools